| 数据并行计算机体系结构研究 |
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| 引用本文： | 王鹏飞,张发存,段敬红.数据并行计算机体系结构研究[J].计算机工程,2011,37(15):249-251. |
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| 作者姓名： | 王鹏飞 张发存 段敬红 |
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| 作者单位： | 西安理工大学计算机科学与工程学院,西安,710048 |
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| 基金项目： | 陕西省教育厅基金资助项目(07JK357);西安理工大学校创新基金资助项目(116-210711) |
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| 摘 要： | 通过对国内外并行计算机体系结构的分析与研究,提出一种面向多媒体应用的嵌入式数据并行计算机体系结构模型,将可重构总线与PIM技术相结合,弥补传统PIM体系结构下处理元之间通信复杂度高、结构可适应性弱等不足.描述其主要部件的功能和结构,定义该体系结构计算机的指令集,通过一个典型的算法样例介绍其汇编语言程序组成和并行计算过程...
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| 关 键 词： | PIM技术 数据并行体系结构 可重构总线 处理元阵列 指令集体系结构 |
| 收稿时间： | 2011-03-16 |
Research on Data Parallel Computer Architecture |
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| WANG Peng-fei,ZHANG Fa-cun,DUAN Jing-hong.Research on Data Parallel Computer Architecture[J].Computer Engineering,2011,37(15):249-251. |
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| Authors: | WANG Peng-fei ZHANG Fa-cun DUAN Jing-hong |
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| Affiliation: | (School of Computer Science and Engineering,Xi’an University of Technology,Xi’an 710048,China) |
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| Abstract: | By the analysis of the architectures of parallel computer, an embedded data parallel computer architecture model is proposed for multimedia processing applications. The limitations of high communication complexity and weak adaptability of the conventional PIM architectures is bridged by this model combined the PIM technology with the reconfigurable bus. The main components and the instruction set are described in detail. A typical algorithm example is given to show the composition of assembly language program and the process of parallel computation. |
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| Keywords: | PIM technology data parallel architecture reconfigurable bus Processing Element（PE） array instruction set architecture |
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