| 面向工程的SoC技术及其挑战 |
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| 引用本文： | 冯亚林,张蜀平.面向工程的SoC技术及其挑战[J].计算机工程,2006,32(23):229-231. |
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| 作者姓名： | 冯亚林 张蜀平 |
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| 作者单位： | 1. 北京大学微电子研究院,北京,100871;北京市122信箱9室,北京,100036
2. 北京市122信箱9室,北京,100036 |
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| 摘 要： | 系统集成芯片(SoC)是21世纪集成电路的发展方向，它以IP核复用技术、超深亚微米工艺技术和软硬件协同设计技术为支撑，是系统集成和微电子设计领域的一场革命。该文阐述了SoC的设计与验证、IP的开发与复用以及工程化SoC所面临的超深亚微米下的物理综合、软硬件协同设计、低功耗设计、可测性设计和可重用技术等方面的挑战。
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| 关 键 词： | 集成电路 系统集成芯片 知识产权核 超深亚微米 协同设计 |
| 文章编号： | 1000-3428（2006）23-0229-03 |
| 收稿时间： | 02 13 2006 12:00AM |
| 修稿时间： | 2006-02-13 |
Techniques and Challenges of Engineering SoC |
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| FENG Yalin,ZHANG Shuping.Techniques and Challenges of Engineering SoC[J].Computer Engineering,2006,32(23):229-231. |
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| Authors: | FENG Yalin ZHANG Shuping |
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| Affiliation: | 1. Institute of Microelectronics, Peking University, Beijing 100871 ; 2. The 9^th Group, P. O. Box No.122, Beijing 100036 |
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| Abstract: | As a development direction of IC in 21^st century, SoC, based on IP core reusing technique, very deep sub-micron technique, co-design of software and hardware technique, is a revolution in system integration and mieroelectronic design. The challenges in design and verification of SoC, development and reuse of IP core and physical synthesis in very deep sub-micron, co-design of software and hardware, low pawer design, design for test and reusability technique of engineering oriented SoC are described. |
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| Keywords: | Integration circuit System on Chip(SoC) IP core Very deep sub-micron Co-design |
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