片上多核网络存取控制器的设计与实现

提出一种基于片上网络消息传输的高效多核网络存取控制器。该网络存取控制器支持收发双工模式，内置一系列可配置寄存器，采用基于消息表的数据接收方式，通过记录并自动更新不同消息的接收配置信息使数据传输更加高效。使用SMIC 0.18 μm工艺进行综合，结果表明，其工作频率可达300 MHz，规模约为20 443门。

Design and Implementation of Multi-processor Network Access Controller for Network-on-Chip

This paper proposes and implements an efficient multi-processor Network Access Controller(NAC) based on message transfers in Network-on-Chip(NoC). It supports receiving and transmitting simultaneously, contains a series of configurable registers, and introduces a Message Table(MT) based receiving method which makes data transfer more efficient by recording and updating receiving configuration information of messages automatically. The hardware scale of the NAC is about 20 443 gates and it operates at 300 MHz AHB clock in SMIC 0.18 μm technology.