| 基于CVI+FPGA的声纳目标回波模拟器研制 |
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| 引用本文： | 赵红军,杨日杰.基于CVI+FPGA的声纳目标回波模拟器研制[J].计算机工程,2007,33(14):227-229. |
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| 作者姓名： | 赵红军 杨日杰 |
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| 作者单位： | 海军航空工程学院信息融合研究所,烟台,264001 |
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| 摘 要： | 在对声纳目标回波模拟器的数学模型、目标回波模型和混响模型研究的基础上，研制了一种基于CVI+FPGA的声纳目标回波模拟器，该模拟器能够产生主/被动声纳测试、定检所需的主/被动声纳回波信号。目标回波信号包括主动声纳、目标发射噪声、海杂波等信号，并以声信号的形式输出。通过性能测试及与实际声纳系统联试，证明该模拟器达到了设计功能和性能指标要求，介绍了声纳目标回波模拟器的数学模型、系统硬件和软件的实现方法。
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| 关 键 词： | 声纳 模拟器 目标回波 数学模型 CVI FPGA |
| 文章编号： | 1000-3428（2007）14-0227-03 |
| 修稿时间： | 2006-07-31 |
Design of Sonar Target Echo Simulator Based on CVI+FPGA |
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| ZHAO Hongjun,YANG Rijie.Design of Sonar Target Echo Simulator Based on CVI+FPGA[J].Computer Engineering,2007,33(14):227-229. |
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| Authors: | ZHAO Hongjun YANG Rijie |
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| Affiliation: | Research Institute of Information Fusion, Naval Aeronautical Engineering Institute, Yantai 264001 |
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| Abstract: | A simulator of sonar target echo has been designed on the base of its mathematical model, target echo model and reverberation model. It can generate active or passive sonar echo signal including passive or active sonar signal, target radiated noise, sea clutter and reverberation signal for passive or active sonar test and inspection. Output form of the sonar target echo simulator is acoustic signal. It has been proved that the simulator meets the standard of the design function and performance by way of performance test and test with practical sonar system. The paper introduces the mathematical model of sonar target echo simulator, and it emphasizes the way to achieve the simulator system’s hardware and software. |
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| Keywords: | sonar simulator target echo mathematical model CVI FPGA |
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