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| 基于排队网络的流水线模拟器任务缓存新分析模型 | |
| 引用本文： | 邱铁,郭禾,冯林,司伟生,刘晓艳.基于排队网络的流水线模拟器任务缓存新分析模型[J].计算机研究与发展,2012,49(1):103-110. |
| 作者姓名： | 邱铁 郭禾 冯林 司伟生 刘晓艳 |
| 作者单位： | 1. 大连理工大学软件学院 辽宁大连 116620;大连理工大学创新实验学院 辽宁大连 116024 2. 大连理工大学软件学院 辽宁大连 116620 3. 大连理工大学创新实验学院 辽宁大连 116024 4. 悉尼大学信息学院 悉尼 2006 |
| 基金项目： | 国家自然科学基金，中央高校基本科研业务费专项资金项目 |
| 摘 要： | 流水线软件模拟器是嵌入式微处理器软件仿真系统的关键技术,提出对嵌入式微处理器流水线仿真系统的排队网络建模与缓存大小分析方法.对SPARC-V8流水线模拟器建立M/M/1/N型排队网络模型,分析指令到达及服务阻塞机制.为了解决模型计算中的阻塞问题,在排队网络模型中增加"保持节点",得到扩展的等价排队网络模型.采用近似计算迭代算法,得到系统性能评价指标,并建立排队网络节点性能关系曲线,确定各功能模块的任务缓存大小.根据得出的任务缓存计算值设置流水线软件模拟器实际缓存大小,实验表明模型计算数据与实际运行数据基本一致.该评价方法对嵌入式微处理器流水线仿真系统的建模与性能分析具有重要的指导意义. |
| 关 键 词： | 嵌入式微处理器 排队网络模型 阻塞 流水线仿真 任务缓存 |
A New Analysis Model for Task Buffer of Pipeline Simulator Based on Queueing Network |
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| Qiu Tie , Guo He , Feng Lin , Si Weisheng , Liu Xiaoyan.A New Analysis Model for Task Buffer of Pipeline Simulator Based on Queueing Network[J].Journal of Computer Research and Development,2012,49(1):103-110. | |
| Authors: | Qiu Tie Guo He Feng Lin Si Weisheng Liu Xiaoyan |
| Affiliation: | 1(School of Software,Dalian University of Technology,Dalian,Liaoning 116620)2(School of Innovation Experiment,Dalian University of Technology,Dalian,Liaoning 116024)3(School of Information Technologies,University of Sydney,Sydney 2006) |
| Abstract: | Pipeline simulator of software is a key technology in software simulation of embedded microprocessors.A new analysis model for the pipeline simulator of the embedded SPARC-V8 microprocessor is proposed,and the associated analysis method for software simulation is also given.Specifically,the queueing network model with M/M/1/N queues is applied to analyze the task arrival and service blocking in the task buffer size of the pipeline simulator.To analyze the blocking phenomenon of pipeline stage,the "holding nodes" are added to the original model and hence obtain an equivalent model that is easy for blocking analysis.The evaluation indices of system performance are calculated by using an iterative algorithm with approximate calculation.The relationship curves between system throughput and task buffer size are established according to the system evaluation indices.The task buffer size values for each functional module for pipeline simulator are obtained by the change trend of curve.The actual buffer size of the pipeline simulator can be set by the calculated values from our model.The experiments show that the data obtained from the model are consistent with the actual operating data.Thus,the new model and the proposed analysis method have important guiding significance for optimizing the performance of the pipeline simulator. |
| Keywords: | embedded microprocessor queueing network model blocking pipeline simulation task buffer |
| 本文献已被 CNKI 万方数据 等数据库收录！ | |
