| HINOC系统MAC协处理器的设计与测试 |
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| 引用本文： | 潘伟涛,邱智亮,闫帅.HINOC系统MAC协处理器的设计与测试[J].微计算机应用,2012,1(4):57-64. |
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| 作者姓名： | 潘伟涛 邱智亮 闫帅 |
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| 作者单位： | 西安电子科技大学 综合业务网理论及关键技术国家重点实验室 西安710071 |
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| 基金项目： | 中央高校基本科研业务费专项资金，国家"863"计划项目 |
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| 摘 要： | 介绍了一种HINOC MAC层硬件加速协处理器的设计方案。首先概述了HINOC MAC层的主要功能,其次描述了MAC协处理器的主要功能、工作流程及实现方案,最后通过搭建测试平台,设计测试方案,验证了该设计能够实现以太网、HIPHY及CPU之间数据的快速搬移,达到减轻CPU处理负荷,提高HINOC端系统业务吞吐能力的预期目标。
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| 关 键 词： | HINOC HIMAC HIPHY FPGA |
Design and Test of a MAC Coprocessor in HINOC System |
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| PAN Weitao
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QIU Zhiliang
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YAN Shuai.Design and Test of a MAC Coprocessor in HINOC System[J].Microcomputer Applications,2012,1(4):57-64. |
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| Authors: | PAN Weitao QIU Zhiliang YAN Shuai |
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| Affiliation: | ( State Key Laboratory of Integrated Services Networks, Xidian Univ. , Xi＇ an ,710071, China) |
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| Abstract: | A hardware acceleration coprocessor is presented based on MAC protocol of HINOC. First, the function of MAC protocol of HINOC is summarized; Secondly, the main function,work flow and realization scheme of the coprocessor are described;Finally, by build- ing the testing platform and designing the test scheme,the design, which has been simulated and has passed the system test, realizes fast data transmission between CPU, HIPHY and Ethernet , and the load of CPU has been reduced largely, the performance index of the HI- NOC system has realized. |
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| Keywords: | HINOC HIMAC HIPHY FPGA |
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