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基于高性能FPGA芯片的千兆网IPSec协议模块
引用本文:周轶男,李曦.基于高性能FPGA芯片的千兆网IPSec协议模块[J].计算机工程与应用,2005,41(19):162-165.
作者姓名:周轶男  李曦
作者单位:中国科学技术大学计算机科学技术系,合肥,230027
摘    要:当前,Internet的应用已经从最初的学术交流目的越来越多地演变为商业行为,其安全性需求日益增加。IPSec协议被广泛地应用于防火墙和安全网关中,但对IPSec协议的处理会大大增加网关的负载,成为千兆网实现的瓶颈。该文提出了一种基于高性能FPGA实现千兆IPSec协议的设计构想,并通过模拟试验证实了该设计方案的可行性和正确性,为进一步的物理实现奠定了基础。

关 键 词:IPSec协议  可编程门阵列  千兆网
文章编号:1002-8331-(2005)19-0162-04
修稿时间:2004年8月1日

Gigabit Net IPSec Protocol Module Research Based on High Performance FPGA
Zhou Yinan,Li Xi.Gigabit Net IPSec Protocol Module Research Based on High Performance FPGA[J].Computer Engineering and Applications,2005,41(19):162-165.
Authors:Zhou Yinan  Li Xi
Abstract:Nowadays,Internet application is turn from academic purposes to business purposes,the requirement of the network security is increasing.IPSec protocol is widely used in firewall and security gateway.However,it becomes the bottleneck to achieve the Gigabit communication,because the processing of IPSec protocol will largely increase the load of the gateway.Based on a high performance FPGA,this paper proposes a new design resolution to implement IPSec protocol in gigabit speed.Simulation results demonstrate the proposed design is correct and feasible,which provides a foundation for further implementation.
Keywords:IPSec Protocol  FPGA  Gigabit net  
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