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基于DSP和ARM的电力故障录波器的设计
引用本文:郑宏婕,严桂,黄文芳,胡双俊.基于DSP和ARM的电力故障录波器的设计[J].电测与仪表,2007,44(10):19-21,4.
作者姓名:郑宏婕  严桂  黄文芳  胡双俊
作者单位:1. 淮海工学院,电子工程系,江苏,连云港,222005
2. 中国矿业大学信息与电气工程学院,江苏,徐州,221008
摘    要:针对目前电力故障录波器所存在的如速度慢、精度低等缺点,本文介绍了一种基于DSP和ARM的电力故障录波器的设计方案.系统采用模块化设计,包括数据采集单元和人机接口单元.数据采集单元采用了硬件同步采样,对数据采集精度有一定的提高;DSP芯片F2812和A/D芯片ADS8364保证了故障录波的高速、高效和高可靠性.人机接口部分包括S3C44B0X芯片、以太网接口、LCD接口、USB接口等,并以以太网接口为例进行了详细的设计介绍.该系统解决方案对交流电参量检测装置的设计具有一定的参考价值.

关 键 词:电力故障录波器  TMS320F2812  S3C44B0X  同步采样
文章编号:1001-1390(2007)10-0019-03
修稿时间:2007-06-26

Design of power fault recorder based on DSP and ARM
ZHENG Hong-jie,YAN Gui,HUANG Wen-fang,Hu Shuang-jun.Design of power fault recorder based on DSP and ARM[J].Electrical Measurement & Instrumentation,2007,44(10):19-21,4.
Authors:ZHENG Hong-jie  YAN Gui  HUANG Wen-fang  Hu Shuang-jun
Affiliation:Dept. of Electronic School of Information ZHENG Hong-jie,YAN Gui, HUANG Wen-fang, Hu Shuang-jun Engineering, Huaihai Institute of Technology, Lianyungang 222005, Jiangsu, China; The and Electrical Engineering, China University of Mining and Technology, Xuzhou 221008, Jiangsu, China
Abstract:In view of the disadvantages such as low speed and low-level efficiency of the current power fault recorder, this paper introduces a design of power fault recorder based on DSP and ARM. The system adopts modularization design which includes data acquisition unit and human-machine interface unit. The accuracy of data collection are apparently improved because the data acquisition unit adopts hardware synchronous sampling; The DSP chip F2812 and A/D chip ADS8364 guarantee the high speed, the efficiency, and the reliability of fault recorder. Human-machine interface in eludes the chip S3C44BOX, the ethernet interface, the LCD interface, the USB interface, etc. And taking the ethernet interface as an example, this paper introduces the detailed design. This solution is useful to the design of the equipment of detection of AC parameters.
Keywords:power fault recorder  TMS320F2812  S3C44BOX  synchronous sampling
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