压接式IEGT芯片布局对其温升的影响

压接式电子注入增强型门极晶体管PP-IEGT(press pack-injection enhanced gate transistor)封装内采用多芯片并联结构,芯片间的布局对器件温升与稳定性有着重要影响。在现有的对齐阵列布局下,芯片间严重的热耦合效应会导致器件结温较高,因此提出一种交错阵列的圆形布局。基于有限元热稳态仿真分析,对比了2种布局下的芯片温度分布,以及封装内各层组件的温度差异;同时,考虑不同功率损耗和外部散热条件的影响,对2种布局下各层组件温度变化进行了讨论。结果表明,提出的交错阵列布局可有效改善热耦合效应,芯片上的热量得到更好地耗散。此外,各芯片和器件整体的温度分布均匀性得到了提高,为更大电流参数PP-IEGT的芯片布局设计和稳定工作提供了参考。

Effects of Chips Layout of Press Pack IEGT on Its Temperature Rise

Press Pack IEGTs (PP-IEGT) are composed of multiple chips within the package, the layout between multi-chip is important for the device temperature and reliability. Due to the thermal couple effect is seriously under aligned array layout, which results in the higher junction temper-ature, a circular layout with staggered array is presented. For both layouts, the temperature distribution of chips and temperature difference be-tween internal components are compared through finite element method. Furthermore, the temperature change of components are discussed under different power loss and heat dissipation conditions. The results show that the staggered array could effectively decrease the thermal cou-ple effect and the heat quantity among chips is dissipated better. The temperature uniformity of chips and whole device are improved. This work will provide some references for chips layout design and reliable operation of higher current level PP-IEGT modules.