星载存储器吞吐率瓶颈与高速并行缓存机制

为解决目前星载存储器无法有效支持多路高速数据并行存储的问题,针对载荷数据高速输入需求,对基于NAND Flash的固态存储器的吞吐率瓶颈进行分析,根据固态存储器的固有写操作特性对有效吞吐率的影响,提出了四级流水线操作和总线并行扩展方案;针对多通道数据并行存储、流水线加载连续性等需求,对使用现场可编程门阵列FPGA(Field-Programmable Gate Array)内部双端口随机存取存储器RAM(Random access memory)、外置静态随机存取存储器SRAM(Static Random Acess Memory)等已有缓存方案的不足进行分析,完成了基于同步动态随机存储器SDRAM(Synchronous Dynamic Random Access Memory)的方案可行性分析与新型存储单元架构设计,最终提出了基于SDRAM的高速多通道缓存与存储协同调度方案.模型仿真与原型功能验证结果表明,方案在极限工况下可将4路高速文件数据连续并行接收缓存至SDRAM中,并可根据各分区缓存状态将文件数据按优先级自主动态写入Flash中,期间缓存无溢出,并最终进入常规动态平衡调度状态,实现了对多路高速载荷数据的并行接收缓存和自主调度存储,且存储器的数据吞吐率可达1.2Gbps,能够满足未来星载存储器对多路高速载荷数据存储的需求.

Bottleneck analysis of spaceborne memory throughput and high-speed parallel caching mechanism design

To solve the problem that the current spaceborne memory cannot support parallel storage of multi-channel high-speed data effectively, this paper proposes two methods. To satisfy the requirement of receiving high-speed payload data, this paper analyzes the throughput bottleneck of NAND Flash-based solid-state memory, and proposes a four-stage pipeline operation and bus parallel expansion scheme according to the inherent write operation characteristics. To meet the needs of parallel storing multi-channel data and the continuity of pipeline operation, this paper analyzes the deficiencies of the data cache methods which use RAM (Random access memory) and SRAM (Static Random Acess Memory), and proposes a scheduling scheme using high-speed caching and cooperative storing, which is based on SDRAM (Synchronous Dynamic Random Access Memory). Through the model simulation and the prototype function verification, we verify that the proposed scheme can effectively support parallel reception of the 4-way high-speed payload data and the autonomous scheduling storage of solid state memory, and the throughput rate of memory can reach 1.2 Gbps, which satisfies the demands for storing the multi-channel high-speed payload data on spaceborne memory in the future.