Small Area ROM Design for Embedded Applications

The compact full custom layout design of a 16 kbit mask-programmable compl ementary metal oxide semiconductor (CMOS) read only memory (ROM) with low power dissip ation is introduced. By optimizing storage cell size and peripheral circuit stru cture, the ROM has a small area of 0.050 mm2 with a power-delay product of 0.011 pJ/bit at 1.8 V. The high packing density and the excellent power-delay product have been achieved by using SMIC 0.18 μm 1P6M CMOS technology. A novel and simple sense amplifier/driver structure is presented which restores th e signal full swing efficiently and reduces the signal rising time by 2.4 ns , as well as the memory access time. The ROM has a fast access time of 8.6 n s. As a consequence, the layout design not only can be embedded into microprocessor system as its program memory, but also can be fabricated individually as ROM ASIC .