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Small-Scale CMOS Pseudo SRAM Module Design
作者姓名:李昀  刘振宇  韩月秋
作者单位:SchoolofInformationScienceandTechnology,BeijingInstituteofTechnology,Beijing100081,China
摘    要:An approach to design small scale CMOS static random access memory (SRAM) is proposed. The design of address decoder, memory cell, and the layout are included. This approach adopts flip-flop array structure.The flip-flops are used as the storage cells and they are stacked to form the whole SRAM module. The word select bit is generated from the address decoder. And one word at a time is selected for reading or writing. The design of the memory core‘s layout is also discussed since it should be optimized to save area and also should be convenient for realization. It‘s a full-custom layout. The address decoder is composed of combinational logic circuit and its layout is also designed as a full-custom layout. With all these modules, the integral structure of the SRAM is cartied out.

关 键 词:静态随机存取存储器  地址译码器  模块设计  布局  CMOS  SRAM
收稿时间:2003/3/31 0:00:00

Small-Scale CMOS Pseudo SRAM Module Design
LI Yun,LIU Zhen-yu and HAN Yue-qiu.Small-Scale CMOS Pseudo SRAM Module Design[J].Journal of Beijing Institute of Technology,2004,13(2):127-130.
Authors:LI Yun  LIU Zhen-yu and HAN Yue-qiu
Affiliation:School of Information Science and Technology, Beijing Institute of Technology, Beijing 100081, China
Abstract:An approach to design small scale CMOS static random access memory (SRAM) is proposed. The design of address decoder, memory cell, and the layout are included. This approach adopts flip-flop array structure. The flip-flops are used as the storage cells and they are stacked to form the whole SRAM module. The word select bit is generated from the address decoder. And one word at a time is selected for reading or writing. The design of the memory core's layout is also discussed since it should be optimized to save area and also should be convenient for realization. It's a full-custom layout. The address decoder is composed of combinational logic circuit and its layout is also designed as a full-custom layout. With all these modules, the integral structure of the SRAM is carried out.
Keywords:static random access memory (SRAM)  memory core  address decoder  layout  module design
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