| 工艺波动致RLC互连延时极值分析 |
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| 引用本文： | 李建伟,董刚,杨银堂,王增.工艺波动致RLC互连延时极值分析[J].西安电子科技大学学报,2009,36(2):301-307. |
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| 作者姓名： | 李建伟 董刚 杨银堂 王增 |
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| 作者单位： | (西安电子科技大学 宽禁带半导体材料与器件教育部重点实验室，陕西 西安 710071) |
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| 基金项目： | 国家自然科学基金，国家杰出青年科学基金，重点实验室基金 |
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| 摘 要： | 基于等效Elmore延时模型和RLC互连的工艺角分析，提出了工艺波动致RLC互连延时快速极值分析方法，可以用于由工艺波动引起的RLC互连延时变化的最好情况和最坏情况分析．采用该方法针对68nm，45nm，36nm和25nm工艺节点进行了仿真验证．结果显示，这种新方法误差小速度快，与HSPICE相比误差小于7％，可以应用在快速静态时序分析中．
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| 关 键 词： | 工艺波动 RLC互连延时 工艺角 |
| 收稿时间： | 2008-07-14 |
Extreme value analysis of RLC interconnect delay induced by process variations |
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| LI Jian-wei,DONG Gang,YANG Yin-tang,WANG Zeng.Extreme value analysis of RLC interconnect delay induced by process variations[J].Journal of Xidian University,2009,36(2):301-307. |
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| Authors: | LI Jian-wei DONG Gang YANG Yin-tang WANG Zeng |
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| Affiliation: | (Ministry of Education Key Lab. of Wide Band-Gap Semiconductor Materials and Devices, Xidian Univ., Xi’an 710071， China) ; |
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| Abstract: | Based on the process corners analysis and equivalent Elmore delay model, a fast extreme value estimation of RLC interconnect delay induced by process variations is presented. It can be used to compute the best-case and worst-case RLC interconnect delay caused by process variations. Simulations for 68nm, 45nm, 36nm and 25nm technologies are given. Results show that the new method has the characteristics of a fast calculating speed and high accuracy, and that the proposed method is less than 7％ in error compared with the HSPICE. It can be used to analyze the delay limit of the critical path in STA. |
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| Keywords: | process variations RLC interconnect delay process corner |
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