GaAs/Si晶圆片键合偏差及影响因素研究

针对化合物半导体与Si基晶圆异质集成中的热失配问题,利用有限元分析方法开展GaAs半导体与Si晶片键合匹配偏差及影响因素研究,建立了101.6 mm(4英寸)GaAs/Si晶圆片键合匹配偏差评估的三维仿真模型,研究了不同键合结构和工艺对GaAs/Si晶圆级键合匹配的影响,系统分析了键合温度、键合压力、键合介质厚度及摩擦特性等因素对键合偏差影响的规律。结果表明,键合压力和键合层摩擦系数对键合偏差的影响极大,并通过对上述因素的优化,其匹配偏差可控制到3μm以内。

Study of GaAs/Si Wafer Bonding Deviation and Effect Factors

Due to the bottleneck of thermal mismatch in the integration process of compound semiconductor and Si wafer,the research focused on the analysis of GaAs/Si wafer bonding deviation and effect factors carried out by the finite element method.A three-dimensional model for calculating matched deviation of 101.6 mm(4 inch)GaAs/Si wafer bonding was established,the effects of different bonding structures and processes such as bonding temperature,bonding pressure,bonding frictional coefficient,and bonding thickness on matched deviation were studied,meanwhile the causes of above effects were analyzed systemically.Those results indicate that the matched deviation is considerably influenced by bonding pressure and bonding frictional coefficient,and it can be controlled under the scope of three micron by optimizing those bonding structures and processes.