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用于GaAs数字IC的难熔栅自对准技术研究
引用本文:赵新建.用于GaAs数字IC的难熔栅自对准技术研究[J].固体电子学研究与进展,1991,11(2):100-106.
作者姓名:赵新建
作者单位:南京电子器件研究所 210016
摘    要:本文用直流磁控溅射方法在离子注入n型GaAs衬底上制备了WSi_xN_y难熔金属膜,研究了它的热稳定性、界面和势垒特性.同时对WSi_(0.6),W,WN等难熔栅金属膜也进行了研究.AES和SIMS分析表明,WSiN/GaAs的界面通过1000℃,10秒钟快速退火(RTA)或850℃,20分钟常规炉退火处理仍保持稳定,势垒高度达到0.8V,理想因子n=1.1.制作了WSiN栅自对准(SAG)增强和耗尽型MESFET.其跨导分别为154mS/mm和250mS/mm.用这一工艺制作的运放差分输入电路从直流到1千兆赫增益达29.5dB.

关 键 词:GaAs  WSiN薄膜  溅射  工艺  自对准

The Research of Refractory Gate Self-aligned Technology for GaAs Digital IC
Abstract:The WSiN thin films have been deposited on ion-implanted n-GaAs by DC magnetic controlled sputtering. The thermal stability and the physical characteristics of WSiN/GaAs interface and Schottky barrier were inv-stigated. Some refractory metals, including WSi0.6, WNx and W films were also studied. The AES and SIMS analysis showed that the WSiN/GaAs interface remains stable after rapid annealing at 1000℃ for 10s or high-temperature furnace annealing at 850℃ for 20mi-nutes. The Schottky barrier height φB and ideal factor n were 0.8V, 1.1 after fumace annealing, respectively, WSiN self-aligned gate(SAG) E/D mode MESFETs were fabricated with transconductancc of 154mS/mm for E-FET and 250mS/mm for D-FET The differential amplifier were also fabricated with gain as high as 29.5dB from DC to 1GHz.
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