模拟电路故障可测性数值判断

本文讨论模拟电路故障可测性问题。提出了以矩阵数值秩为依据的故障可测性数值判断方法,给出了考虑容差扰动及数值计算误差时的故障可测性条件。根据可测性分析与设计的不同要求,将可测性条件分解为拓扑条件和数值限制两个方面描述。文献1]给出了拓扑条件,本文对数值限制作了讨论,给出了可测性数值判据。

NUMERICAL JUDGMENT OF FAULT TESTABILITY FOR ANALOG CIRCUITS

A fault testability of analog circuits is discussed. The numerical judgment method for fault testability based on the numerical rank of matrices is presented. The testability conditions which not only include the topological testability restriction, but also takes the parameter tolerances and numerical errors into consideration, are given. According to the different requirments in testability analysis and designs, the testability condition is separated into two parts: topological condition and numerical restriction. The criterion of the later is presented here, while the former was given in Ref.1] .