Memristive Logic‐in‐Memory Integrated Circuits for Energy‐Efficient Flexible Electronics

A memristive nonvolatile logic‐in‐memory circuit can provide a novel energy‐efficient computing architecture for battery‐powered flexible electronics. However, the cell‐to‐cell interference existing in the memristor crossbar array impedes both the reading process and parallel computing. Here, it is demonstrated that integration of an amorphous In‐Zn‐Sn‐O (a‐IZTO) semiconductor‐based selector (1S) device and a poly(1,3,5‐trivinyl‐1,3,5‐trimethyl cyclotrisiloxane) (pV3D3)‐based memristor (1M) on a flexible substrate can overcome these problems. The developed a‐IZTO‐based selector device, having a Pd/a‐IZTO/Pd structure, exhibits nonlinear current–voltage (I–V) characteristics with outstanding stability against electrical and mechanical stresses. Its underlying conduction mechanism is systematically determined via the temperature‐dependent I–V characteristics. The flexible one‐selector?one‐memristor (1S–1M) array exhibits reliable electrical characteristics and significant leakage current suppression. Furthermore, single‐instruction multiple‐data (SIMD), the foundation of parallel computing, is successfully implemented by performing NOT and NOR gates over multiple rows within the 1S–1M array. The results presented here will pave the way for development of a flexible nonvolatile logic‐in‐memory circuit for energy‐efficient flexible electronics.