大频偏低信噪比条件下QPSK载波环的设计

在介绍锁相环原理的基础上,针对大频偏和低信噪比条件对锁相环参数进行修正,并分析了传统判决反馈环载波跟踪方法的缺点。提出一种在大频偏和低信噪比条件下FFT频偏估计辅助锁相环的设计方法。仿真结果表明该环路在极低信噪比下仍可以快速捕获。将该方法应用于工程中,并与单锁相环载波同步系统的锁定时间进行比较,实测结果证明了分析的正确性。

Design of QPSK Carrier Loop for Low SNR Signals with Large Frequency Offset

Theory of PLL is presented firstly, then, the parameters of PLL are modified for low SNR with large frequency offset, and the disadvantage of carrier tracking using the decision feedback loop is analyzed. Based on that, a new design of DPLL assisted by FFT estimating frequency offset is proposed, which is used under conditions of low SNR with large frequency offset. The simulation result indicates that the loop has the ability of fast acquisition even in very low SNR. In the end, it is compared with the single PLL carrier loop in project, and the result shows that it can be used broadly.