多层介质中多导体拐角结构电容参数的提取

本文给出一种计算多层介质中多导体拐角互连结构的准静态电容参数的快速算法─—维数缩减技术（DRT），并和有限差分法相结合，快速、准确地提取了多层介质中多导体拐角结构的准静态电容矩阵。由于维数缩减技术能充分利用集成电路结构分层的特点，从而大大减少了计算所需的时间和存储空间。文中给出的计算结果与Ansoft软件的计算结果吻合得较好，而计算所需的时间和存储空间大大少于Ansoft软件。

Capacitance Extraction of Multilayer and Multiconductor Bends

In this paper. an efficient method to calculate the capacitance of multiple conductors embeded in multilayers named Dimension Reduction Technique (DRT) is presented. When DRT is combined with Finite Difference Method (FDM), the quasi-static capacitance matrix of bends embeded in multilayer dielectrlc media is extracted exactly and effectively. Since the method takes full advantage of the characteristic of the stratified structure in integrated circuit, computing time and memory are saved greatly. Compared with Ansoft's SPICELINK, results given in this paper are quite accurate, and computing time and space needed are far less than those used by Ansoft software.