Design of a Silicon Based High Speed Plasmonic Modulator

In this paper, we propose a silicon-based high-speed plasmonic modulator. The modulator has a double-layer structure with a 16 μm long metal-dielectric-metal plasmonic waveguide at the upper layer and two silicon single-mode waveguides at the bottom layer. The upper-layer plasmonic waveguide acts as a phase shifter and has a dielectric slot that is 30 nm wide. Two taper structures that have gradually varied widths are introduced at the bottom layer to convert the photonic mode into plasmonic-slot mode with improved coupling efficiency. For a modulator with two 1 μm-long mode couplers, simulation shows that there is an insertion loss of less than 11 dB and a half-wave voltage of 3.65 V. The modulation bandwidth of the proposed modulator can be more than 100 GHz without the carrier effect being a limiting factor in silicon. The fabrication process is also discussed, and the proposed design is shown to be feasible with a hybrid of CMOS and polymer technology.