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NEW APPROACH TO EMULATE SEU FAULTS ON SRAM BASED FPGAS
作者姓名:Reza Omidi Gosheblagh  Karim Mohammadi
作者单位:Department of Electrical Engineering, Iran University of Science and Technology (IUST), Narmak, Tehran 16846-13114, Iran
摘    要:Field Programmable Gate Arrays (FPGAs) offer high capability in implementing of com- plex systems, and currently are an attractive solution for space system electronics. However, FPGAs are susceptible to radiation induced Single-Event Upsets (SEUs). To insure reliable operation of FPGA based systems in a harsh radiation environment, various SEU mitigation techniques have been provided In this paper we propose a system based on dynamic partial reconfiguration capability of the modern devices to evaluate the SEU fault effect in FPGA. The proposed approach combines the fault injection controller with the host FPGA, and therefore the hardware complexity is minimized. All of the SEU injection and evaluation requirements are performed by a soft-core which realized inside the host FPGA Experimental results on some standard benchmark circuits reveal that the proposed system is able to speed up the fault injection campaign 50 times in compared to conventional method.

关 键 词:Field  Programmable  Gate  Arrays  (FPGAs)  Single-Event  Upset  (SEU)  fault  injection  Soft-core  Space  radiation  effects

New approach to emulate SEU faults on SRAM based FPGAS
Reza Omidi Gosheblagh,Karim Mohammadi.New approach to emulate SEU faults on SRAM based FPGAS[J].Journal of Electronics,2014,31(1):68-77.
Authors:Reza Omidi Gosheblagh  Karim Mohammadi
Affiliation:Department of Electrical Engineering, Iran University of Science and Technology (IUST), Narmak, Tehran 16846-13114, Iran
Abstract:Field Programmable Gate Arrays (FPGAs) offer high capability in implementing of complex systems, and currently are an attractive solution for space system electronics. However, FPGAs are susceptible to radiation induced Single-Event Upsets (SEUs). To insure reliable operation of FPGA based systems in a harsh radiation environment, various SEU mitigation techniques have been provided. In this paper we propose a system based on dynamic partial reconfiguration capability of the modern devices to evaluate the SEU fault effect in FPGA. The proposed approach combines the fault injection controller with the host FPGA, and therefore the hardware complexity is minimized. All of the SEU injection and evaluation requirements are performed by a soft-core which realized inside the host FPGA. Experimental results on some standard benchmark circuits reveal that the proposed system is able to speed up the fault injection campaign 50 times in compared to conventional method.
Keywords:Key words Field Programmable Gate Arrays (FPGAs)  Single-Event Upset (SEU) fault injection  Soft-core  Space radiation effects
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