| 基于C P L D的通用并行接口设计 |
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| 引用本文： | 俞承芳,虞惠华,汤庭鳌.基于C P L D的通用并行接口设计[J].半导体技术,2001,26(10):9-12. |
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| 作者姓名： | 俞承芳 虞惠华 汤庭鳌 |
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| 作者单位： | 1. 复旦大学电子工程系
2. 复旦大学微电子系 |
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| 摘 要： | 论述了基于CPLD的通用并行接口设计。在嵌入式系统中采用CPLD具有系统简单、灵活的优点。由于使用EDA工具，在设计过程中直接进行逻辑验证，避免了系统设计过程中可能发生的错误。本设计采用了模块设计的方法，使设计过程简化，并具有设计再利用的性能。
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| 关 键 词： | CPLD 并行接口 嵌入式系统 集成电路 电路设计 |
| 文章编号： | 1003-353(2001)10-0009-04 |
Design of general-purpose parallel interface based on CPLD |
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| YU Cheng-fang,YU Hui-hua,TANG Ting-ao.Design of general-purpose parallel interface based on CPLD[J].Semiconductor Technology,2001,26(10):9-12. |
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| Authors: | YU Cheng-fang YU Hui-hua TANG Ting-ao |
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| Affiliation: | YU Cheng-fang1,YU Hui-hua2,TANG Ting-ao2 |
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| Abstract: | The design of general-purpose parallel interface based on CPLD is described in this paper. As a result, system design could be simplified with more flexibility by adopting CPLD in embedded system. With EDA tools, logic verification is directly used in the course of design, the fault could be avoided. The module method has been used in the design, so the design process becomes simpler and more efficient. It also has reusable performance. |
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| Keywords: | CPLD parallel interface embedded system |
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