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Design and Implementation of an FPGA-Based Data/Timing Formatter |
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| Authors: | Yu-Yi Chen Jiun-Lang Huang Terry Kuo Xuan-Lun Huang |
| Affiliation: | 1. Graduate Institute of Electronics Engineering, Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan 2. OpenATE Inc., Taipei, Taiwan 3. Industrial Technology Research Institute, Zhudong, Hsinchu, Taiwan |
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| 本文献已被 SpringerLink 等数据库收录！ | |
