| 高电源抑制比的CMOS亚阈值多输出电压基准 |
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| 引用本文： | 李泳佳,夏晓娟.高电源抑制比的CMOS亚阈值多输出电压基准[J].国外电子元器件,2009(12):8-11. |
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| 作者姓名： | 李泳佳 夏晓娟 |
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| 作者单位： | 东南大学国家ASIC系统工程技术研究中心; |
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| 摘 要： | 基于工作在亚阈值区的MOS器件，运用CMOS电流模基准对CATA和PTAT电流求和的思想．提出一种具有低温漂系数、高电源抑制比（PSRR）的CMOS电压基准源，该电路可同时提供多个输出基准电压，且输出电压可调。该基准源基于CSMC0．5μm标准CMOS工艺，充分利用预调节电路并改进电流模基准核心电路。使整个电路的电源抑制比在低频时达到122dB，温度系数（TC）在0-100℃的温度范围内约7ppm／℃。
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| 关 键 词： | CMOS电压基准源 电源抑制比(PSRR) 亚阈值区 电压预调节电路 多输出 |
Multiple-output CMOS weak inversion voltage reference of high PSRR |
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| LI Yong-jia,XIA Xiao-juan.Multiple-output CMOS weak inversion voltage reference of high PSRR[J].International Electronic Elements,2009(12):8-11. |
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| Authors: | LI Yong-jia XIA Xiao-juan |
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| Affiliation: | LI Yong-jia,XIA Xiao-juan(National ASIC System Engineering Research Center,Southeast University,Nanjing 210096,China) |
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| Abstract: | A CMOS voltage reference with muhiple-output,high power supply rejection ratio （PSRR）and low temperature coefficient （TC）is presented.It is based on subthreshold MOSFETs and CMOS current-mode structure.Pre-regulator and improved voltage reference core of the circuit are proposed.The circuit,designed and simulated in CSMC standard 0.5μm CMOS technology,exhibits PSRR of 122dB at low frequency and TC of 7ppm/℃ for the range of 0-100℃. |
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| Keywords: | CMOS voltage reference power supply rejection ratio(PSRR) weak inversion region pre-regulator circuit multiple-output |
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