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基于FPGA的FIR数字滤波器的优化设计
引用本文:张月红,王马华,朱霞.基于FPGA的FIR数字滤波器的优化设计[J].现代电子技术,2011,34(14):44-46,50.
作者姓名:张月红  王马华  朱霞
作者单位:淮阴工学院电子与电气信息工程学院,江苏,淮安,223003
基金项目:教育部新世纪优秀人才支持计划
摘    要:提出采用正则有符号数字量(CSD)编码技术实现FIR滤波器。首先分析了FIR数字滤波器理论及常用设计方法的不足,然后介绍了二进制数的CSD编码技术及其特点,给出了其于CSD编码的定点常系数FIR滤波器设计过程,使用VHDI,语言实现了该常系数滤波器的行为描述。最后在Max+PlusⅡ环境下进行实验仿真和验证,与DA和2C编码算法比较结果表明,用CSD编码技术实现的滤波器可以有效提高运算速度并降低FPGA芯片的面积占用。

关 键 词:CSD编码  分布式算法  FIR  FPGA  常系数乘法

Optimal Design of FIR Digital Filter Based on FPGA
ZHANG Yue-hong,WANG Ma-hua,ZHU Xia.Optimal Design of FIR Digital Filter Based on FPGA[J].Modern Electronic Technique,2011,34(14):44-46,50.
Authors:ZHANG Yue-hong  WANG Ma-hua  ZHU Xia
Affiliation:ZHANG Yue-hong,WANG Ma-hua,ZHU Xia(Faculty of Electronics and Electrical Engineering,Huaiyin Institute of Technology,Huaian 223003,China)
Abstract:Based on canonic signed CSD algorithm, a FIR digital filter is proposed. Firstly, the theories of FIR digital fil- ter and the shortages of usual designing method are analyzed, then the technology for CSD coding of binary is introduced, and the design process of a fixed point FIR based on CSD coding is presented, the FIR system is realized with VHDL. At last, the simulation design is carried out under Max+ Plus Ⅱcircumstance, the simulation results show that CSD arithmetic can reduce the use of resources and improve the running speed compared with DA and 2C coding algorithm.
Keywords:CSD coding  distributed arithmetic(DA)  FIR  FPGA  multiplication of constant coefficient  
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