基于FPGA的高阶FIR滤波器设计

对于高阶FIR滤波器,由于运算量较大,采用软件等方式无法达到实时处理的要求。文中提出了采用FPGA实现快速卷积结构的高阶FIR滤波器,推导出将大点数FFT分解为二维FFT变换的公式。根据上述理论在采用Verilog HDL语言设计了基于一维转二维FFT的快速卷积结构高阶FIR滤波器。实验表明,该基于FPGA的高阶FIR滤波器具有精度高、速度快、资源消耗少、调试方便、易于集成等优点,并可达到工程实践的要求。

Design of High Order FIR Filter Design Based on FPGA

FIR filter is wildly used in digital signal processing.It is difficult to realize high order FIR filters by using software because of large amount of computing.This paper introduces the use of FPGA to implement high order FIR filter with fast convolution structure and deducts the formula of large point FFT decomposition to two-dimensional FFT.According to the above theory,a high order FIR filter with fast convolution structure is designed based on the one-dimensional to two-dimensional FFT using Verilog HDL language.The experimental results show that the high order FIR filter based on FPGA meets the requirements of practice in engineering with high accuracy and speed,low consumption of resources as well as easy adjustment and integration.