S波段GaAs高效率线性内匹配HFET研制

介绍了一种基于GaAs HFET结构的S波段内匹配器件的设计方法。由于大栅宽器件模型难以准确确定,提取了具有相似结构的小栅宽器件模型。在ADS设计环境中,利用Load-Pull算法推算出大栅宽器件的管芯阻抗。器件采用两个栅宽为16mm的管芯进行功率合成。对于匹配电路的设计,首先通过一级LC低通滤波网络进行阻抗变换,将每个管芯的阻抗提升到10Ω左右,再通过Wilkinson功分器将阻抗变换到50Ω。电容和功分器采用瓷片加工,电感则通过金丝实现。研制成功的内匹配功率管,其工作频率为2.2～2.5GHz,输出功率P1dB大于20W,功率增益G1dB大于14dB,功率附加效率大于48%。

Study of High Efficiency Linear Intermatching S-Band GaAs HFETs

The design of S-band intermatching devices based on GaAs HFET structures was introduced.Because of the difficulty to achieve the model of large gate width FETs,the model of small gate width HFETs with similar structures was used.The model of large gate width HFETs was achieved through Load-Pull method by ADS.The two chips with 16 mm gate width were used to synthesize power.For the design of the matching circuit,the impedance of each chip was changed to about 10 Ω through one stage LC low-pass filter,and then the impedance was changed to 50 Ω by the Wilkinson divider.The capacitance and divider were processed with the ceramic,and the inductance was realized with the golden line.The results show that P1dB is greater than 20 W,G1dB is greater than 14 dB and power-added efficiency is greater than 48% at 2.2-2.5 GHz for the intermatching device.