基于Interlaken协议的高速数据流接口设计与性能分析

目前，高速网络处理系统的板级互连带宽达到了40G比特速率级，这对网络处理系统的处理速度和吞吐量提出了极大的挑战。为解决核心路由器40 Gb/sPOS线路接口板中器件间的高速数据交互难题,采用Interlaken协议对高速数据流接口设计方法进行了研究，利用高端FPGA的高速通道和IP核设计技术，完成了链路层处理芯片与转发...

Interface design and performance analysis of the high-speed data stream based on Interlaken protocol

The board-level interconnect bandwidth of high-speed network processing system has reached up to 40G bit rate currently,which presents a great challenge to process speed and throughput for the network processing system.To address the high-speed data exchange between devices in the 40Gb/s POS line-card of the core router,Interlaken protocol is used as the high-speed data stream interface design method,and with the high-speed channel resource in the FPGA device and the IP core design technology,the high-speed data packets internet is accomplished between the link layer processing chip and the relaying & processing FPGA device.The system uses eight high-speed channels,each channel rate up to 6.25Gb/s to meet 40Gb/s throughput.The testing results show that the performance can meet the system requirements completely with the appropriate configuration parameters of Interlaken IP.The key parameters for the IP core and control register with adaptive and dynamic reconfigurable configurations in different scenarios are also discussed.