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基于EDMA实现TMS320C64X与FPGA的数据传输
引用本文:顾永红.基于EDMA实现TMS320C64X与FPGA的数据传输[J].电子工程师,2012(4):61-63,74.
作者姓名:顾永红
作者单位:中国人民解放军总参谋部第六十三研究所,南京 210007
摘    要:结合TMS320C64XDSP+FPGA信号处理平台,简述了TMS320C64X DSP的硬件结构,重点介绍直接存储器访问(EDMA)的硬件结构和配置方法。数据经现场可编程门阵列(Field-Pro-grammable Gate Array,FPGA)及DSP外部存储器接口(EMIF)由EDMA传输到数字信号处理器(DSP)片内,传输过程不需要CPU干预,并且采用乒乓缓冲结构,CPU同时可以进行数据处理,提高了数据传输、处理的速度,保证了实时性。

关 键 词:数字信号处理器(TMS320C64X  DSP)  增强型直接存储器访问  外部存储器接口  现场可编程门阵列  乒乓缓冲

Data Transmission between TMS320C64X and FPGA Based on EDMA
Gu Yonghong.Data Transmission between TMS320C64X and FPGA Based on EDMA[J].Electronic Engineer,2012(4):61-63,74.
Authors:Gu Yonghong
Affiliation:Gu Yonghong (The 63rd Research Institute of PLA General Staff Head Quarters, Nanjing 210007, China)
Abstract:This paper introduces hardware architecture of TMS320C64X DSP simply, hardware architec ture and configuration method of Enhanced Direct Memory Access (EDMA) in detail, based on TMS320C64X DSP and FPGA digital signal process system. Data flow through FPGA and External Memory Interface (EMIF), and transmit into DSP by using EDMA. By adopting pingpong buffering strategy, transmission pro cedure doesn't need CPU's interference and CPU can process data at the same time, which speeds up data trans mission and data processing, and meet the realtime reouirement.
Keywords:TMS320C64X DSP  enhanced direct memory access (EDMA)  external memory interface(EMIF)  field programmable gate array (FPGA)  ping-pong buffering
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