混合模式下详细布局算法的时延优化策略

在集成电路物理设计中,布局是提升电路时延性能的关键阶段。对混合单元模式的详细布局采取二段式的时延优化策略,以此提高布局质量。在合法化阶段,代价函数中采用增加时延权重因子的方法来调整单元的移动策略,使单元分布更有利于时延。在优化阶段,对关键路径上单元的位置进行评价,试探性地对这些单元进行位置微调,在减少关键路径时延的同时避免对布局产生大的扰动,进一步优化了时延。实验结果表明,二段式时延优化策略能够在线长代价较小的情况下有效地提升电路性能。

An Timing Improvement Strategy for Mixed Mode Detailed Placement

With greater impact of placement process on timing performance in physical design of integrated circuits, a two-stage timing improvement strategy for mixed mode detailed placement is presented. In legalization stage, on the basis of the cost function and delay weight factor, there is an algorithm of moving cells to gain the better cells location for timing. In optimization stage, finding a method of estimating each cell location on critical paths and a tentative way of small-step moving cells, it can reduce the delay of critical paths and prevent the disturb of placement result legalization developed at the same time. Experiments show that the strategy can enhance the timing quality of circuit effectively at less costs of wire length.