基于FPGA的多路并行混合数据存储系统

为了解决多路信号并行混合采集存储的问题,文中设计了一种以FPGA为控制芯片的多路并行采集存储系统。该系统选用XC6SLX163CSG324I为主控芯片,设计包括数据采集接收模块、数据存储模块、数据回读模块。数据接收模块包括16路模拟量数据、导引头(DYT)数据、脉冲编码调制(PCM)数据和控制命令数据。该系统充分利用FPGA可重构的优势,对内部资源合理利用,降低了硬件资源开销,对所接收数据进行多路并行采集存储;利用握手原则,减少了数据的丢失。实验结果表明,该系统存储速率最高可达25 Mbyte/s,且备用口回读数据时,帧计数连续,该系统准确性较高。

Multi-Channel Parallel Hybrid Data Storage System Based on FPGA

In order to solve the problem of multi-channel signal parallel mixed acquisition and storage,a multi-channel parallel acquisition and storage system based on FPGA is designed. The system uses XC6 SLX163 CSG324 I as the main control chip. The design includes data acquisition and receiving module,data storage module and data readback module. The data receiving module includes 16-channel analog data,seeker(DYT)data,pulse code modulation(PCM)data and control command data. This system makes full use of the advantages of FPGA reconfigurable,makes reasonable use of internal resources,reduces the overhead of hardware resources,and carries out multi-channel parallel acquisition and storage of the received data. Using the handshake principle,the loss of data is reduced. The experimental results show that the storage rate of the system can reach up to 25 Mbyte/s,and the frame count is continuous when the data is read back by the standby port,and the system has high accuracy.