64dB二进制增益控制带有DCOC和AB类buffer的可编程增益放大器

本文设计了一款二进制增益控制，带有直流失调消除（DCOC）电路以及AB类输出buffer的可编程增益放大器。该放大器采用二极管连接负载的差分放大器结构，电路性能对温度变化及工艺偏差不敏感。根据测试，通过6位数字信号控制，电路可以实现-2dB ~ 61dB的增益动态范围，增益步长1dB，步长误差在 0.38dB以内，最小3dB带宽为92MHz，在低增益模式下，IIP3可达17dBm，1dB压缩点可达5.7dBm。DCOC电路可使该放大器应用于直接变频接收机中，而AB类输出buffer则降低了电路的静态功耗。

A binary-weighted 64-dB programmable gain amplifier with a DCOC and AB-class buffer

This paper designs a binary-weighted programmable gain amplifier (PGA) with a DC offset cancellation (DCOC) circuit and an AB-class output buffer. The PGA adopts the circuit topology of a differential amplifier with diode-connected loads. Simulation shows that the performance of the PGA is not sensitive to temperature and process variation. According to test results, controlled by a digital signal of six bits, the PGA can realize a dynamic gain of -2 to 61 dB, and a gain step of 1 dB with a step error within ± 0.38 dB. The minimum 3 dB bandwidth is 92 MHz. At low-gain mode, IIP3 is 17 dBm, and a 1 dB compression point can reach 5.7 dBm. The DCOC circuit enables the amplifier to be used in a direct-conversion receiver and the AB-class output buffer circuit reduces the overall static power consumption.