A 4 GS/s 4 bit ADC with 3.8 GHz analog bandwidth in GaAs HBT technology

An ultra-wideband 4 GS/s 4 bit analog-to-digital converter (ADC) which is fabricated in 2-level interconnect, 1.4 μm InGaP/GaAs HBT technology is presented. The ADC has a -3 dB analog bandwidth of 3.8 GHz and an effective resolution bandwidth (ERBW) of 2.6 GHz. The ADC adopts folding-interpolating architecture to minimize its size and complexity. A novel bit synchronization circuit is used in the coarse quantizer to eliminate the glitch codes of the ADC. The measurement results show that the chip achieves larger than 3.4 ENOBs with an input frequency band of DC-2.6 GHz and larger than 3.0 ENOBs within DC-4 GHz at 4 GS/s. It has 3.49 ENOBs when increasing input power by 4 dB at 6.001 GHz of input. That indicates that the ADC has the ability of sampling signals from 1st to 3rd Nyquist zones (DC-6 GHz). The measured DNL and INL are both less than ±0.15 LSB.The ADC consumes power of 1.98 W and occupies a total area of 1.45 × 1.45 mm2.