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SOC时代低功耗设计的研究与进展
引用本文:王祚栋,魏少军.SOC时代低功耗设计的研究与进展[J].微电子学,2005,35(2):174-179.
作者姓名:王祚栋  魏少军
作者单位:清华大学,微电子学研究所,北京,100084
摘    要:在片上系统(SOC)时代,芯片内核的超高功耗密度以及移动应用市场对低功耗的无止境需求,使低功耗设计变得日益重要.文章全面系统地介绍了低功耗设计的相关内容,包括背景、原理和不同层次的功耗优化技术,着重介绍了面向SOC的系统级功耗优化技术.通过对已有研究成果按设计抽象层次和系统功能的分析,指出了其优化的全局性不够充分.提出了基于软硬件协同设计的系统功耗优化思路和设计流程,展望了SOC低功耗设计的发展方向.

关 键 词:片上系统  低功耗设计  IC设计
文章编号:1004-3365(2005)02-0174-06

Research and Progress of Low Power Design in SOC Era
WANG Zuo-dong,WEI Shao-jun.Research and Progress of Low Power Design in SOC Era[J].Microelectronics,2005,35(2):174-179.
Authors:WANG Zuo-dong  WEI Shao-jun
Abstract:In SOC era, the ultra high power density of the chip, together with the greedy demand of the mobile market for low power, makes low power design increasingly important. The design for low power, including its background, principle and techniques, is systematically described, with emphasis on system-level power optimization technologies targeted for SOC's. Through analysis of the existing study results by various abstract levels and system functions, a severe deficiency of insufficient global optimality is discovered. A constructive idea for system power optimization and a design flow based on hardware/software co-design are presented. Finally, the development trend of the low power design of SOC's in the future is discussed.
Keywords:System-on-chip  Low power design  IC design
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