Low-temperature processing of shallow junctions using epitaxial and polycrystalline CoSi2 |
| |
Authors: | Erin C Jones Nathan W Cheung David B Fraser |
| |
Affiliation: | (1) Department of Electrical Engineering and Computer Sciences, University of California, 94720-1772 Berkeley, CA;(2) Components Research, Intel Corporation, 3065 Bowers Ave., 95052 Santa Clara, CA |
| |
Abstract: | Cobalt disilicide is grown epitaxially on (100) Si from a 15 nm Co/2 nm Ti bilayer by rapid thermal annealing (RTA) at 900°C.
Polycrystalline CoSi2 is grown on (100) Si using a 15 nm Co layer and the same annealing condition. Silicide/p+-Si/n-Si diodes are made using the silicide as dopant source:11B+ ions are implanted at 3.5–7.5 kV and activated by RTA at 600–900°C. Shallow junctions with total junction depth (silicide
plus p+ region) measured by high-resolution secondaryion mass spectroscopy of 100 nm are fabricated. Areal leakage current densities
of 13 nA/cm2 and 2 nA/cm2 at a reverse bias of -5V are obtained for the epitaxial silicide and polycrystalline silicide junctions, respectively, after
700°C post-implant annealing. |
| |
Keywords: | B CoSi2 epitaxial silicide shallow junction Si doping |
本文献已被 SpringerLink 等数据库收录! |