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动态随机存储器栅极侧壁硅化钨残留的去除工艺
引用本文:彭坤,王飚,肖德元,仇圣棻,吴萍.动态随机存储器栅极侧壁硅化钨残留的去除工艺[J].纳米技术与精密工程,2009,7(4):305-309.
作者姓名:彭坤  王飚  肖德元  仇圣棻  吴萍
作者单位:1. 昆明理工大学机电学院,昆明,650093;西南交通大学经济管理学院,成都610031;中芯国际集成电路制造有限公司晶圆S1厂,上海,201203
2. 昆明理工大学机电学院,昆明,650093
3. 中芯国际集成电路制造有限公司晶圆S1厂,上海,201203
基金项目:国家自然科学基金资助项目,高等学校博士学科点专项科研基金资助项目,中芯国际集成电路制造有限公司及日本富士通微电子株式会社企业资助项目 
摘    要:动态随机存储器栅极侧壁硅化钨残留造成的短路成为制约提高产品良率及可靠性的瓶颈.为此,采用X射线荧光光谱(XRF)、扫描电镜(SEM)等检测分析手段优化硅/钨原子组成比为2.45.透射电镜(TEM)及电性参数测试结果表明,经30s、1000℃快速热处理可获得方块阻值为12Ω/cm^2的硅化钨,且可刻蚀性能好.在硅化钨刻蚀前利用电子束扫描发现,15min的氢氟酸和10min浓硫酸与过氧化氢混合溶液(SPM)在300W超声波条件下的新湿法清洗工艺,能去除84.7%的表面微粒及残留聚合物.整合上述优化工艺可以将硅化钨残留造成的65nm动态随机存储器芯片失效率由31.3%降到1.9%,为研究下一代产品提供有效借鉴.

关 键 词:硅化钨  侧壁残留  漏电流  快速热处理  湿法清洗  动态随机存储器

Integrated Cleaning Process for WSi_x Gate Sidewall Residue of DRAM
PENG Kun,WANG Biao,XIAO De-yuan,QIU Sheng-fen,WU Ping.Integrated Cleaning Process for WSi_x Gate Sidewall Residue of DRAM[J].Nanotechnology and Precision Engineering,2009,7(4):305-309.
Authors:PENG Kun  WANG Biao  XIAO De-yuan  QIU Sheng-fen  WU Ping
Affiliation:1.School of Mechanical and Electric;Kunming University of Science and Technology;Kunming 650093;China;2.School of Economics and Management;Southwest Jiaotong University;Chengdu 610031;3.S1 Process Integration;Semiconductor Manufacturing International Corporation;Shanghai 201203;China
Abstract:Dynamic random access memory (DRAM) suffers from the bridge issue due to the WSi, residue on gate sidewall, which is the bottleneck to enhancing the product's yield and reliability. Thus, the Si/W atomic ratio of WSix is optimized to 2.45 by using X-ray fluorescence (XRF) and scanning electron microscope (SEM). Analysis by transmission electron microscopy (TEM) and electronic testing shows that after 30 s rapid thermal annealing( RTA) at 1 000℃, the sheet resistance of WSi2.45 film is 12 Ω/cm2 and can be easily etched off . Electron beam scanning before the WSix film etching shows that about 84. 7% of the surface particles and polymer residue can be effectively removed through a novel wet cleaning process by 15 min HF and 10 min sulfuric-peroxide mixture (SPM) with 300 W megasonic. With these integrated optimized processes, the yield loss due to the WSi, residue on the 65 nm DRAM products can be reduced from the original 31. 3% to 1. 9% , which also serves as a good guideline for future advanced DRAM process development.
Keywords:WSix  sidewall residue  leakage current  rapid thermal annealing (RTA)  wet clean  dynamic random access memory (DRAM)
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