| 基于边界元法的二维VLSI版图电容提取 |
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| 引用本文： | 胡庆生,林争辉.基于边界元法的二维VLSI版图电容提取[J].计算机辅助设计与图形学学报,1998,10(1):29-34. |
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| 作者姓名： | 胡庆生 林争辉 |
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| 作者单位： | 上海交通大学大规模集成电路研究所 |
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| 摘 要： | 文章中提出了一种用边界元法计算ＶＬＩＳ版图电容的方法，它通过求解二维Ｌａｐｌａｃｅ方程，直接得到包括寄生电容在内的版图电容的值。与其它计算电容的数值方法相比，该方法数据准备简单，占有内存少，计算效率高，并且有较高的精度。
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| 关 键 词： | VLSI 参数提取 电容计算 边界元法 二维 版图 |
EXTRACTION OF 2D CAPACITANCE FOR VLSI LAYOUT BASED ON BOUNDARY ELEMENT METHOD |
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| HU Qing Sheng\ LIN Zheng Hui.EXTRACTION OF 2D CAPACITANCE FOR VLSI LAYOUT BASED ON BOUNDARY ELEMENT METHOD[J].Journal of Computer-Aided Design & Computer Graphics,1998,10(1):29-34. |
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| Authors: | HU Qing Sheng\ LIN Zheng Hui |
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| Abstract: | This paper presents a two dimensional (2D) extraction of VLSI capacitance based on the boundary element method. By solving 2D Laplace equation, various kinds of capacitance including parasitic capacitance are obtained. Compared with other numerical methods, the extractor can not only prepare the input data easily, but also has high efficiency and precision. Through applying the extractor to several examples of VLSI layout, the calculated results show good coincidence with the experimental data. |
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| Keywords: | VLSI parameter extraction capacitance computation boundary element method |
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