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Sub‐Micron Anisotropic InP‐based III–V Semiconductor Material Deep Etching for On‐Chip Laser Photonics Devices
Authors:Doris Keh‐Ting Ng  Chee Wei Lee  Vivek Krishnamurthy  Qian Wang
Affiliation:Data Storage Institute (A*STAR) Agency for Science Technology & Research, 2 Fusionopolis Way #08‐01 Innovis 138634, Singapore
Abstract:
Two InP‐based III–V semiconductor etching recipes are presented for fabrication of on‐chip laser photonic devices. Using inductively coupled plasma system with a methane free gas chemistry of chlorine and nitrogen at a high substrate temperature of 250 °C, high aspect ratio, anisotropic InP‐based nano‐structures are etched. Scanning electron microscopy images show vertical sidewall profile of 90° ± 3°, with aspect ratio as high as 10. Atomic Force microscopy measures a smooth sidewall roughness root‐mean‐square of 2.60 nm over a 3 × 3 μm scan area. The smallest feature size etched in this work is a nano‐ring with inner diameter of 240 nm. The etching recipe and critical factors such as chamber pressure and the carrier plate effect are discussed. The second recipe is of low temperature (?10 °C) using Cl2 and BCl3 chemistry. This recipe is useful for etching large areas of III–V to reveal the underlying substrate. The availability of these two recipes has created a flexible III–V etching platform for fabrication of on‐chip laser photonic devices. As an application example, anisotropic InP‐based waveguides of 3 μm width are fabricated using the Cl2 and N2 etch recipe and waveguide loss of 4.5 dB mm?1 is obtained.
Keywords:inductively‐coupled plasma etching  InP waveguide  nanostructures  photonics device engineering
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