基于FPGA的低成本长距离高速传输系统的设计与实现

借助Altera CycloneⅢFPGA的LVDS I/O通道产生LVDS信号,稳定地完成了数据的高速、远距离传输。系统所需的8B/10B编解码、数据时钟恢复(CDR)、串/并行转换电路、误码率计算模块均在FPGA内利用VHDL语言设计实现,大大降低了系统互联的复杂度和成本,提高了系统集成度和稳定性。

Design and implementation of low-cost long-distance high-speed data transmission system based on FPGA

With the LVDS signal produced by Altera CycloneⅢFPGA I/O channel,the system completed the high-speed data, long-distance transmission stably.8B/10B coder and decoder,clock data recovery(CDR),string/parallel transition circuit,BER calculation module were all designed with VHDL in FPGA,witch reduce the complexity and costs of interconnected system improve the system integration and stability.