首页 | 官方网站   微博 | 高级检索  
     

中间表示设计中基于链表的多寄存器操作数处理
引用本文:刘章林,石学林,冯晓兵,张兆庆.中间表示设计中基于链表的多寄存器操作数处理[J].计算机工程,2006,32(1):25-27.
作者姓名:刘章林  石学林  冯晓兵  张兆庆
作者单位:中国科学院计算技术研究所体系结构室,北京,100080;中国科学院研究生院,北京,100039
摘    要:以简单但具有代表性的配对寄存器为例,分析了编译器中间表示设计中使用配对信息所需包含的要点。结合编译器中数据流分析,指令调度和寄存器分配的需求,进一步提出了一种基于链表结构的中间表示及构造算法。所提出的表示方法同时考虑到编译器的可移植性,以便于在不同编译器中实现。

关 键 词:中间表示  多寄存器操作数  配对寄存器  链表
文章编号:1000-3428(2006)01-0025-03
收稿时间:2004-12-28
修稿时间:2004-12-28

Multi-registers Operands Handle Based on Chain for Intermediate Representation Design
LIU Zhanglin,SHI Xuelin,FENG Xiaobing,ZHANG Zhaoqing.Multi-registers Operands Handle Based on Chain for Intermediate Representation Design[J].Computer Engineering,2006,32(1):25-27.
Authors:LIU Zhanglin  SHI Xuelin  FENG Xiaobing  ZHANG Zhaoqing
Affiliation:1 .Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080 2.Graduate School of Chinese Academy of Sciences, Beijing 100039
Abstract:This paper focuses on the design of intermediate representation and puts forward an intermediate representation for pair register based on chain. First, it analyzes the points that 1R design should handle when adapts to pair registers. Then, it puts forward a chain-based 1R when considering the demand of data flow analysis, instruction scheduling and register allocation. At last, an algorithm is given. Retarget is another important phase and the paper tries to figure out a common 1R for the chips with multi-register operands.
Keywords:Intermediate representation  Multi-register operands  Pair registers  Chain
本文献已被 CNKI 维普 万方数据 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司    京ICP备09084417号-23

京公网安备 11010802026262号