| 基于FPGA的高性能数据采集和预处理系统的设计 |
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| 引用本文： | 徐建丽,吴长瑞.基于FPGA的高性能数据采集和预处理系统的设计[J].淮阴工学院学报,2014(5):43-46,68. |
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| 作者姓名： | 徐建丽 吴长瑞 |
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| 作者单位： | 1. 淮安信息职业技术学院电子工程学院,江苏淮安,223003
2. 中国科学院声学研究所,北京,100190 |
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| 摘 要： | 为满足电子战接收机对瞬时输入带宽的应用要求,提出一种基于FPGA的高性能数据采集和预处理系统。该系统采用3片Virtex-5 FPGA对ADC采样数据进行协同处理,能够实现双通道4.8Gsps的数据采样。实验结果表明,在相同测试条件下,该系统比传统的系统具有更好的信噪比和更高的有效位。
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| 关 键 词： | 高速数据采集 可编程门阵列 宽带信号 |
Design of High-Performance Data Sampling and Preprocessing System Based on FPGA |
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| XU Jian-li,WU Chang-rui.Design of High-Performance Data Sampling and Preprocessing System Based on FPGA[J].Journal of Huaiyin Institute of Technology,2014(5):43-46,68. |
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| Authors: | XU Jian-li WU Chang-rui |
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| Affiliation: | XU Jian-li;WU Chang-rui;Department of Electric Engineering,Huaian College of Information Tchnology;Institute of Acoustics,Chinese Academy of Sciences; |
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| Abstract: | To meet the requirements of wide instantaneous input bandwidth of the electronic warfare （ EW） re-ceivers, a high-performance data sampling and preprocessing systemwas presented based on FPGA.The sys-tem can co-process sampled data with three FPGAs and achieve up to 4.8 Gsps dual channel data sampling. The experiment results demonstrated that the system designed in the paper had a better SNR （ Signal Noise Rati-o） and higher ENOB （Effective Number of Bits） than the traditional system under the same parameter condi-tions. |
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| Keywords: | high-speed data sampling FPGA wideband signal |
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