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| Low power DCVSL circuits employing AC power supply | |
| 作者姓名： | 吴训威 杭国强 Massoud Pedram |
| 作者单位： | WU Xunwei HANG Guoqiang & Massoud Pedram1. Institute of Circuits and Systems，Ningbo University，Ningbo 315211，China;2. Department of Information and Electronic Engineering，Zhejiang University，Hangzhou 310027，China;3. Department o |
| 基金项目： | This work was supported in part by the National Natural Science Foundation of China ( Grant No. 69973039)，and National Science Foundation of USA (Grant No. 9988441) . |
| 摘 要： | In view of changing the type of energy conversion in CMOS circuits, this paper investigates low power CMOS circuit design, which adopts a gradually changing power clock. First, we discuss the algebraic expressions and the corresponding properties of clocked power signals. Then the design procedure is summed up for converting complementary CMOS logic gates employing DC power to the power-clocked CMOS gates employing AC power. On this basis, the design of differential cas-code voltage switch logic (DCVSL) circuits employing AC power clocks is proposed. The PSPICE simulations using a sinusoidal power-clock demonstrate that the designed power-clocked DCVSL circuit has a correct logic function and low power characteristics. Finally, an interface circuit to convert clocked signals into the standard logic levels of a CMOS circuit is proposed, and its validity is verified by computer simulations. |
| 收稿时间： | 24 December 2001 |
Low power DCVSL circuits employing AC power supply |
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| Wu Xunwei , Hang Guoqiang and Massoud Pedram.Low power DCVSL circuits employing AC power supply[J].Science in China(Information Sciences),2002,45(3):232-240. | |
| Authors: | Wu Xunwei Hang Guoqiang and Massoud Pedram |
| Affiliation: | 1. Institute of Circuits and Systems, Ningbo University, Ningbo 315211, China 2. Department of Information and Electronic Engineering, Zhejiang University, Hangzhou 310027, China 3. Department of Electronic Engineering-Systems, University of Southern California, Los Angeles, CA 90089, USA |
| Abstract: | In view of changing the type of energy conversion in CMOS circuits, this paper investigates low power CMOS circuit design, which adopts a gradually changing power clock. First, we discuss the algebraic expressions and the corresponding properties of clocked power signals. Then the design procedure is summed up for converting complementary CMOS logic gates employing DC power to the power-clocked CMOS gates employing AC power. On this basis, the design of differential cas-code voltage switch logic (DCVSL) circuits employing AC power clocks is proposed. The PSPICE simulations using a sinusoidal power-clock demonstrate that the designed power-clocked DCVSL circuit has a correct logic function and low power characteristics. Finally, an interface circuit to convert clocked signals into the standard logic levels of a CMOS circuit is proposed, and its validity is verified by computer simulations. |
| Keywords: | VLSI design low power technique AC power clocked DCVSL circuit |
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