多核Cache稀疏目录性能提升方法综述

受限于功耗，十多年前通用微处理器就停止追求更高的主频转而向集成更多处理器核的方向发展；同时，随着晶体管密度按摩尔定律不断提高，单片可集成的处理器核数成倍增长，片上多核、众核处理器已成为高性能微处理器发展的主流。未来千核级通用众核处理器支持共享存储编程模型是一种必然趋势，但传统的Cache一致性目录结构面临着查找延迟高、目录项替换频繁以及硬件代价和功耗可扩展性有限等问题。稀疏目录实现了传统目录结构硬件开销与一致性维护效率的折衷，被认为是众核处理器维护Cache一致性的一种高能效、可扩展结构。综述了近年来提高稀疏目录性能的相关研究与方法，并对其在面积、访问延迟、功耗和实现复杂性等方面进行分析，归纳出这些方法各自的优点和存在的不足，对创新设计未来高性能众核处理器共享存储体系结构具有一定的参考价值。

A survey of performance improvement methods for multi-core cache sparse directory

Due to limited power consumption, the general-purpose processor stopped pursuing higher frequency more than a decade ago and moved towards integrating more processor cores on a single chip. At the same time, with the increasing density of transistors according to the law of Moore, the number of processor cores integrated on a single chip has been doubled and redoubled, thus multi core and many core processors have become the mainstream of high-performance processors. It is an inevitable trend for the future kilo-core general processor to support shared memory programming model. However, the traditional cache coherence directory structure is confronted with the problems of high latency, frequent replacement of directory entries, limited scalability for the hardware cost and power consumption. The sparse directory realizes the tradeoff between the hardware cost of the traditional directory structure and the coherence maintenance efficiency, and is considered as an energy-efficient and scalable structure for many-core processors to maintain cache coherence. We review related research and methods for improving the performance of sparse directory in recent years, analyze their characteristics in terms of area, access delay, power consumption and implementation complexity, and summarize the merits and shortcomings of these directory schemes. It has certain reference significance for designing novel scalable shared memory architectures for future many-core processors.