| 嵌入式 CPU 总线接口单元设计 |
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| 引用本文： | 刘钟宇.嵌入式 CPU 总线接口单元设计[J].微处理机,2014(4):12-14. |
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| 作者姓名： | 刘钟宇 |
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| 作者单位： | 中国电子科技集团公司第四十七研究所,沈阳110032 |
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| 摘 要： | 随着嵌入式技术的不断发展，对嵌入式 CPU 的要求越来越高，而总线接口单元是嵌入式 CPU 不可或缺的重要组成部分，它为嵌入式 CPU 和外设及存储器之间提供了接口控制，是决定系统性能的重要因素。深入了解总线接口单元的基本结构和设计方法对嵌入式的开发大有好处。
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| 关 键 词： | 总线接口单元 处理器 片上系统 主机 从机 |
Design on BIU of Built -in CPU |
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| LIU Zhong-yu.Design on BIU of Built -in CPU[J].Microprocessors,2014(4):12-14. |
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| Authors: | LIU Zhong-yu |
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| Affiliation: | LIU Zhong-yu (Tire 47th Research Institule of Citiaa Electronics Technology Group Corporation ,Shenyaag 110032, China ) |
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| Abstract: | According to the development of built -in technology,the requirement for the built -in CPU is getting higher and higher.The BIU,as the important port,provides the interface between CPU and peripheral equipment which controls the capability of the system.It is useful for development of BIU to deeply study its structure and design. |
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| Keywords: | BIU CPU SoC Master Slave |
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