基于PLL技术的射频信号数字调谐系统的分析设计

本文以锁相环PLL（Phase—LockedLoops）技术为理论基础，通过对射频信号接收机本振（LO，Local Oscnlator），即数字频率调谐部分的分析，提出了一种对低功耗BICMOS数字频率调谐电路的分析设计方法，详细分析了它的工作原理，并给出了具体电路，仿真波形以及分析数据。该电路的主要特点是采用可编程的分频器调谐频率分频比，从而使PLL系统自动锁定在想要的频率电压上，以此来控制压控振荡器VCO（Voltage Controlled Oscillator）经再次分频后形成L0输出。

Analysis and Design of RF Signal digital Tuning System Based on a PLL Technology

The paper is based on Phase-Locked Loops technology with the analysis to Local Oscillator tuning of RF signal digital receiver. A method for BICMOS digital frequency tuning circuit with very low power dissipation is presented. The theory of the tuning system is demonstrated in detail, on its circuits and curves and data of simulation. The circuit adopts a programmable divider to decide a divide ratio which is needed. Consequently, the Phase-Locked Loops system will be locked on a concerned frequency. Accord...