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A 70 nm 16 Gb 16-Level-Cell NAND flash Memory |
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| Authors: | Shibata N Maejima H Isobe K Iwasa K Nakagawa M Fujiu M Shimizu T Honma M Hoshi S Kawaai T Kanebako K Yoshikawa S Tabata H Inoue A Takahashi T Shano T Komatsu Y Nagaba K Kosakai M Motohashi N Kanazawa K Imamiya K Nakai H Lasser M Murin M Meir A Eyal A Shlick M |
| Affiliation: | Toshiba Corp. Semicond. Co., Yokohama; |
| Abstract: | A 16 Gb 16-level-cell (16LC) NAND flash memory using 70 nm design rule has been developed . This 16LC NAND flash memory can store 4 bits in a cell which enabled double bit density comparing to 4-level-cell (4LC) NAND flash, and quadruple bit density comparing to single-bit (SLC) NAND flash memory with the same design rule. New programming method suppresses the floating gate coupling effect and enabled the narrow distribution for 16LC. The cache-program function can be achievable without any additional latches. Optimization of programming sequence achieves 0.62 MB/s programming throughput. This 16-level NAND flash memory technology reduces the cost per bit and improves the memory density even more. |
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