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基于FPGA分布式算法的滤波器设计
引用本文:崔永强,高晓丁,贺素馨.基于FPGA分布式算法的滤波器设计[J].现代电子技术,2010,33(16):117-119.
作者姓名:崔永强  高晓丁  贺素馨
作者单位:西安工程大学,陕西,西安,710048
摘    要:设计了FPGA的分布式算法结构和具体的硬件环境。基于FPGA的分布式算法充分利用FPGA的并行处理特性设计算法,简化了滤波器系统设计。采用了分割查找表技术,节省了FPGA硬件资源。对查找表(LUT)中内容经过相应的修改即可方便地实现低通、高通、带通滤波。对基于FPGA分布式算法的滤波器进行了仿真及工况环境下的测试实验。实验结果表明,该算法不仅提高了系统运行速度,而且节省了大量的FPGA资源,还具有极大的灵活性。

关 键 词:FPGA  FIR滤波器  分布式算法  LUT

Design of Filter Based on FPGA Distributed Algorithm
CUI Yong-qiang,GAO Xiao-ding,HE Su-xin.Design of Filter Based on FPGA Distributed Algorithm[J].Modern Electronic Technique,2010,33(16):117-119.
Authors:CUI Yong-qiang  GAO Xiao-ding  HE Su-xin
Affiliation:(Xi'an Polytechnic University,Xi'an 710048,China)
Abstract:The structure of FPGA distributed algorithm(DA)and the specific hardware environment is designed in this paper.The design of the filter system is simplified with FPGA distributed algorithm and by making full use of FPGA parallel processing algorithm.The technique of partition look-up table(LUT)is adopted to save FPGA hardware resources.The low-pass,high-pass and band-pass filtering can be conveniently achieved by the corresponding modification of the content in LUT.The filter based on FPGA distributed algorithm was tested under the condition of simulation and operation mode.The results show that the algorithm can not only increase the speed of system calculation and save a lot of FPGA resources,but also has enormous flexibility.
Keywords:FPGA  FIR  LUT
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