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一种高精度的大点数二维FFT处理器设计
引用本文:于 东,李 丽,韩 峰,王 堃,丰 帆,潘红兵.一种高精度的大点数二维FFT处理器设计[J].现代雷达,2016(5):16-21.
作者姓名:于 东  李 丽  韩 峰  王 堃  丰 帆  潘红兵
作者单位:南京大学电子科学与工程学院;南京大学电子科学与工程学院;南京大学电子科学与工程学院;南京大学电子科学与工程学院;南京大学电子科学与工程学院;南京大学电子科学与工程学院
基金项目:国家自然科学基金资助项目; 高等学校博士学科点专项科研基金资助项目;江苏省科技厅科技厅产学研联合创新基金;江苏高校优势学科建设工程资助项目
摘    要:基于传统的频域抽取快速傅里叶变换(FFT)算法以及二维FFT算法,设计了一种高精度的大点数FFT处理器。该处理单元采用一个状态机控制整个运算流程,针对小点数情况的一维FFT算法和大点数情况的二维FFT算法,该处理器都可以智能地选择合适的处理流程和缓存管理,自动地完成整个FFT运算而无需软件介入。在支持大点数的二维FFT算法的基础上,该设计还通过对旋转因子计算过程的优化,以提高在大点数情况下的精度表现,在4M长度的输入序列时可以获得130 dB以上的信噪比。

关 键 词:快速傅里叶变换  二维快速傅里叶算法  高精度  大点数  旋转因子优化

A High-precision FFT Processor Supporting 2D FFT Algorithm
YU Dong,LI Li,HAN Feng,WANG Kun,FENG Fan and PAN Hongbing.A High-precision FFT Processor Supporting 2D FFT Algorithm[J].Modern Radar,2016(5):16-21.
Authors:YU Dong  LI Li  HAN Feng  WANG Kun  FENG Fan and PAN Hongbing
Affiliation:College of Electronic Science and Engineering, Nanjing University;College of Electronic Science and Engineering, Nanjing University;College of Electronic Science and Engineering, Nanjing University;College of Electronic Science and Engineering, Nanjing University;College of Electronic Science and Engineering, Nanjing University;College of Electronic Science and Engineering, Nanjing University
Abstract:Based on the traditional DIF FFT and 2D FFT algorithm, a high-precision FFT processor supporting various input data size is designed. In the procedure of FFT calculation, a finite state machine is used as a controller. When the input data size varies in a range, the cache can be smartly managed and 1D/2D FFT algorithm is automatically chosen according to the situation whether the amount of input data is beyond the cache size. Therefore the whole FFT calculation can be completed without any involvement of software but a start signal. Other than the support to 2D FFT algorithm in case the cache is not enough, an optimization in the calculation procedure of twiddle factor is introduced to improve its precision and furtherly to improve the precision of final results when facing a large input data size. In the FPGA verification, a 130 dB or higher SNR(signal-noise ratio) is reached while the SNR is only around 110 dB without this optimization.
Keywords:FFT  2D FFT algorithm  high precision  large data size  optimization about twiddle factor
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