| 一种抑制同步开关噪声的改进总线翻转编码方法 |
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| 引用本文： | 胡晋,刘耀,金利峰.一种抑制同步开关噪声的改进总线翻转编码方法[J].微电子学,2009,39(6). |
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| 作者姓名： | 胡晋 刘耀 金利峰 |
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| 作者单位： | 江南计算技术研究所,江苏,无锡,214083 |
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| 基金项目： | 预先研究基金资助项目 |
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| 摘 要： | 提出了一种改进总线翻转编码方法,用于抑制高速集成电路系统中的同步开关噪声.该方法可以显著减少总线平均翻转比特位数,同时尽可能使总线相邻位保持奇模传输,有利于改善信号完整性.利用FPGA实现了提出的改进总线翻转编码模块.物理实验表明,相对总线翻转编码,该方法以功耗稍有增加的代价,可取得平均翻转数量减少15.17%、电源波动噪声减小22.34%的编码增益.
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| 关 键 词： | 高速集成电路 总线翻转编码 同步开关噪声 |
A Modified Bus-Invert Encoding Method for Simultaneous Switching Noise Reduction |
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| HU Jin,LIU Yao,JIN Lifeng.A Modified Bus-Invert Encoding Method for Simultaneous Switching Noise Reduction[J].Microelectronics,2009,39(6). |
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| Authors: | HU Jin LIU Yao JIN Lifeng |
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| Affiliation: | HU Jin,LIU Yao,JIN Lifeng (Jiangnan Research Institute of Computing Technology,Wuxi,Jiangsu 214083,P.R.China) |
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| Abstract: | A bus-invert encoding method was improved for simultaneous switching noise reduction in high speed IC system.The method greatly reduces the average inverting bits of data-bus and keeps adjacent bus line transmission in odd mode for signal integrity.The proposed bus-invert encoding module was implemented in FPGA.Test results showed that, with a slight power increase, average transition time decreased by 15.17% and voltage fluctuation noise was reduced by 22.34%. |
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| Keywords: | High speed IC Bus-invert encoding Simultaneous switching noise |
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