Comparative investigation of InP/InGaAs heterostructure-emitter tunneling and superlattice bipolar transistors |
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Authors: | Jung-Hui Tsai Ching-Sung Lee Chung-Cheng Chiang Yi-Ting Chao |
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Affiliation: | 1. Department of Electronic Engineering, National Kaohsiung Normal University, Kaohsiung, 802, Taiwan 2. Department of Electronic Engineering, Feng Chia University, Taichung, 407, Taiwan
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Abstract: | In this article, the characteristics of InP/InGaAs heterostructure-emitter bipolar transistors with 30 n-InP layer tunneling layers and a five-period InP/InGaAs superlattice are demonstrated and comparatively investigated by experimentally results and analysis. In the three devices, a 200 Å n-In0.53Ga0.47As layer together with an n-InP tunneling emitter layer (or n-InP/n-InGaAs superlattice) forms heterostructure emitter to decrease collector-emitter offset voltage. The results exhibits that the largest collector current and current gain are obtained for the tunneling transistor with a 30 Å n-InP tunneling emitter layer. On the other hand, some of holes injecting from base to emitter will be blocked at n-InP/n-InGaAs heterojunction due to the relatively small hole transmission coefficient in superlattice device, which will result in a considerable base recombination current in the n-InGaAs layer. Therefore, the collector current and current gain of the superlattice device are the smallest values among of the devices. |
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